The following thesis proposals are offered in collaboration with Infineon Technologies Italia Srl, Padova site.
Infineon is a global leader in semiconductor solutions for automotive, industrial, and power applications.

These thesis projects are primarily intended for students enrolled in the Master’s or Bachelor’s Degree in Electronic Engineering, with a particular interest in digital electronics, FPGA design, and AI-assisted hardware design methodologies.
A solid background in digital design, hardware description languages (e.g., VHDL, Verilog, SystemVerilog), and digital systems architecture is highly appreciated. Students who have successfully attended or completed the University of Padova courses on these subjects are especially encouraged to apply.

Each thesis combines theoretical investigation, practical implementation, and validation activities, and can be tailored to the student’s interests and skills.

If you are interested in one of these topics, please contact Prof. Daniele Vogrig via email at 📧 daniele.vogrig@unipd.it

🧩 Thesis Proposal 1

Programmable Micro-Sequence Controller for Versatile Communication Interfaces in Automotive Applications

Description:
The goal of this thesis is to design and implement a programmable micro-sequencer capable of supporting multiple communication protocols. By simply updating the content of a ROM, the sequencer should be able to switch between different protocols seamlessly, enabling flexibility and reusability in automotive communication systems.

Objectives:

• Define the instruction set architecture (ISA) of the micro-sequencer.

• Develop the RTL description of the micro-sequencer.

• Implement firmware capable of realizing a communication protocol.

• Test and validate the system through simulation.

Notes:
The activity may be split into two consecutive theses if required.

Supervisor / Company:
[Company name – local automotive electronics company]

Keywords:
FPGA, RTL design, micro-sequencer, communication protocols, automotive electronics

🤖 Thesis Proposal 2

Using Artificial Intelligence to Enable Easily Reconfigurable RTL Designs

Description:
This thesis explores how Artificial Intelligence (AI) can assist in creating RTL (Register Transfer Level) designs that are highly generic and easily reconfigurable. The work aims to develop design methodologies that allow parameterization of registers, interface signals, and features, improving portability and efficiency across multiple hardware platforms.

Objectives:

• Define a methodology for parametric reconfigurability of RTL designs.

• Train an AI model to recognize RTL structures and the chosen parametrization approach.

• Use AI to automatically parameterize and adapt RTL code.

• Test and validate the generated RTL through simulation and verification.

Supervisor / Company:
[Company name – local electronic design company]

Keywords:
AI-assisted design, RTL parametrization, hardware automation, digital design, FPGA

⚙️ Thesis Proposal 3

Using Artificial Intelligence for Behavioral Modeling of Analog Macros

3.a – AI-Based Generation of Behavioral Models for Analog Macros (Real-Number Approach)

Description:
Functional verification of mixed-signal systems requires accurate behavioral models of analog blocks. Traditionally, these models are written in SystemVerilog using a real-number approach, starting from a detailed hierarchical description. This thesis aims to explore the use of AI techniques to automatically generate such models.

Objectives:
To be defined jointly with the student, depending on the specific direction of the work.

Supervisor / Company:
[Company name – local mixed-signal design company]

Keywords:
AI modeling, analog macros, SystemVerilog, real-number modeling, mixed-signal verification

3.b – AI-Based Generation of Top-Level Behavioral Models for Analog Macros (Real-Number Approach)

Description:
Similar to proposal 3.a, but focusing on generating a single top-level behavioral model of a complex analog macro. The AI system will create a “flat” model based on macro requirements and high-level behavioral descriptions provided as input.

Objectives:
To be defined jointly with the student, depending on the specific direction of the work.

Supervisor / Company:
[Company name – local mixed-signal design company]

Keywords:
AI modeling, top-level modeling, analog macros, SystemVerilog, behavioral simulation

3.c – AI-Based Generation of Behavioral Models for Analog Macros (Fixed-Point Approach)

Description:
This proposal is similar to 3.a but uses a fixed-point modeling approach instead of real numbers. The purpose is to enable FPGA-based emulation of analog macros together with digital RTL blocks, allowing hardware-in-the-loop validation on FPGA platforms.

Objectives:
To be defined jointly with the student, depending on the specific direction of the work.

Supervisor / Company:
[Company name – local mixed-signal design company]

Keywords:
AI modeling, fixed-point modeling, analog emulation, FPGA verification, mixed-signal systems